S1M8660A Datasheet, PDF (12/32 Pages) Samsung semiconductor – RX IF / BBA WITH GPS

S1M8660A (Preliminary)
RX IF/BBA WITH GPS
CLK
STB
DATA
Clock period: 0.6 - 10us
Clock duty cycle: 35 - 65%
Clcok N
STB line setup time
Clcok N+1
Clcok N+2
All data transitions happen while CLK=Low
DATA line hold time:
50 - 200ns
Valid data bit (N) Valid data bit (N+1) Valid data bit (N+2)
N+1 Data bit set-up
time : > 50ns
STB line hold time:
50 - 200ns
Figure 3. 3-Line Serial Port Interface Timing
TCXO
TCXO/N
STRONG
OUTPUT
TCXO/N
WEAK
OUTPUT
TCXO
period: 50.8ns
TCXO high time: TCXO low time:
25.4ns
25.4ns
Rise time: Fall time:
3 -12ns 3 -12ns
TCXO/4 period: 101.6ns
TCXO/4 high
time: 101.6ns
TCXO/4 low time:
101.6ns
TCXO input level:
>300mVpp
TCXO/N weak output level:
1.5 - 2.7Vpp
Figure 4. TCXO and TCXO/N Timing
12