U635H256 Datasheet, PDF (8/13 Pages) Simtek Corporation – PowerStore 32K x 8 nvSRAM

U635H256
PowerStore and automatic Power Up RECALL
V_CC
5.0 V
V_SWITCH
AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA
PowerStore
Power Up
RECALL
W
DQi
24
t_RESTORE
t_PDSTOREp
t
24
t_RESTORE
t_DELAYp
POWER UP BROWN OUT
BROWN OUT
RECALL NO STORE
PowerStore
(NO SRAM WRITES)
No.
Software Controlled STORE/
RECALL Cycle^{k, o}
27 STORE/RECALL Initiation Time
28 Chip Enable to Output Inactive^p
29 STORE Cycle Time^q
30 RECALL Cycle Time^r
31 Address Setup to Chip Enable^s
32 Chip Enable Pulse Width^{s, t}
33 Chip Disable to Address Change^s
Symbol
Alt.
t_AVAV
t_ELQZ
t_ELQXS
t_ELQXR
t_AVELN
t_ELEHN
t_EHAXN
IEC
t_cR
t_dis(E)SR
t_d(E)S
t_d(E)R
t_su(A)SR
t_w(E)SR
t_h(A)SR
25
35
45
Unit
Min. Max. Min. Max. Min. Max.
25
35
45
ns
600
600
600 ns
10
10
10 ms
20
20
20 µs
0
0
0
ns
20
25
30
ns
0
0
0
ns
o: The software sequence is clocked with E controlled READs.
p: Once the software controlled STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
q: Note that STORE cycles (but not RECALL) are aborted by V_CC < V_SWITCH (STORE inhibit).
r: An automatic RECALL also takes place at power up, starting when V_CC exceeds V_SWITCH and takes t_RESTORE. V_CC must not drop below
V_SWITCH once it has been exceeded for the RECALL to function properly.
s: Noise on the E pin may trigger multiple READ cycles from the same address and abort the address sequence.
t: If the Chip Enable Pulse Width is less than t_a(E) (see Read Cycle) but greater than or equal t_w(E)SR, than the data may not be valid at
the end of the low pulse, however the STORE or RECALL will still be initiated.
8
December 12, 1997