Z8FMC16MCU Datasheet, PDF (7/14 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Series

Z8FMC16 MCU
Programming Specification
5
Flash Bypass Mode Register Structure
Figure 1 illustrates the multiplexed register structure that allows access to all Flash
memory signals through GPIO ports.
Registers
Flash
XADDR[9:0]
Data
Input/Output
PortA0
PortA1
PortA2
PortA3
PortA4
PortA5
PortA6
PWM2L
Register
Select
PWM2H
PWM1L
PWM1H
YADDR[5:0]
DIN[7:0]
DOUT[7:0]
XE
YE
OE
SE
ERASE
PROG
MAS1
NVSTR
TMR
IFREN
Figure 1. Flash Bypass Mode Register Structure
Bypass Mode Register Read Timing
Figure 2 illustrates the timing of a read operation using the Flash controller bypass mode
registers. While reading data, output data is latched into the output register on the first
PRS000502-1005
PRELIMINARY
Flash Memory Programming Overview