Z8FMC16MCU Datasheet, PDF (4/14 Pages) Zilog, Inc. – Z8 Encore-R Motor Control Series

Z8FMC16 MCU
Programming Specification
2
.
Signal
XADDR[9:0]
YADDR[5:0]
DIN[7:0]
DOUT[7:0]
XE
YE
SE
OE
ERASE
MAS1
PROG
NVSTR
TMR
IFREN
Table 1. Flash Memory Control Signals
Direction
I
I
I
O
I
I
I
I
I
I
I
I
I
I
Description
X address input selects a row. XADDR[9:0] corresponds to the upper
10 bits of the program memory address space (PROGMEM[15:6]).
For Z8 Encore!^® devices with less than 64KB of program memory, the
unused upper address bits must be set to 0.
Y address input selects one byte within a row. YADDR[5:0]
corresponds to the lower 6 bits of the program memory address space
(PROGMEM[5:0]).
Data input.
Data output.
X address enable.
Y address enable.
Sense amplifier enable.
Output enable.
Erase enable. This signal is used to select erase operations.
Mass erase select. This signal is used to distinguish between page
erase and mass erase operations.
Program enable. This signal is used to select a program operation.
Non-volatile store enable. This signal is used during page erase, mass
erase, and programming operations.
This signal should be set to 1 during all operations.
Information area select.
Flash Memory Operations
When bypassing the Flash controller, all Flash memory operations (read, program, page
erase, and mass erase) are available. The mode of operation is set by the Flash memory
control signals as described in Table 2.
The selection of the Flash main memory or the Flash information area depends on the
IFREN signal as described in Table 3.
PRS000502-1005
PRELIMINARY
Flash Memory Programming Overview