Z8F2480 Datasheet, PDF (5/24 Pages) Zilog, Inc. – Load current up to 3 amps

Z8F2480 Power Monitor with an eZ80F91 Webserver
Reference Design
Debug connectors J4–J6 are for factory use only and may ship unassembled on the Power
Board.
eZ80F91 Webserver Module
A top view of the eZ80F91 Module is shown in Figure 2 on page 2. To learn more about
the eZ80F91 Module, refer to the eZ80Acclaim!/eZ80AcclaimPlus! Ethernet Modules
Product Specification (PS0306).
Principles of Operation
After main power is applied to the Power Board, the auxiliary power supply on the
eZ80F91 Module becomes active and the voltage on capacitor CE1 rises. After the voltage
on capacitor CE1 reaches 5 V, the linear voltage regulator (U3) becomes active and sup-
plies 3.3 V to the Z8F2480 MCU (U12) to initiate a Power-On Reset (POR) cycle of the
MCU.
After the POR cycle completes, the Z8F2480 firmware configures one of its internal com-
parators (C1) to generate a high-level output when the half-wave rectified (HWR) AC volt-
age on R9 exceeds an internal threshold (i.e., approximately 0.4 V), thereby activating Q2
to create a negative gate/source voltage (VGS) on depletion-mode MOSFET Q1. In turn,
Q1 is caused to turn off when VGS reaches its cutoff threshold (approximately –4 V),
thereby limiting the power dissipated by Q1 during its positive half-cycle. When the volt-
age on R9 is below the Z8F2480 MCU’s internal threshold, Comparator C1 output is low,
Q2 turns off, and Q1 turns back on to recharge CE1.
Next, the Z8F2480 MCU delays approximately 5 seconds to ensure that its high-precision
20 ppm 32 kHz oscillator is stable. The MCU, by using its more-accurate external oscilla-
tor, then self-calibrates the accuracy of its 2.7648 MHz Internal Precision Oscillator (IPO)
to allow the software to accurately measure the period of the AC signal, which is later
transmitted to the eZ80F91 Module over the optically-isolated I²C bus, converted to a fre-
quency, and displayed on the eZ80F91 web page.
As part of the initialization sequence, the Z8F2480 MCU’s ADC converter is configured
to measure the output voltage of the signal conditioner/amplifier circuit (Q3 source).
Depending on the setting of Switch U5-A, this amplifier output is either a scaled represen-
tation of the AC voltage (as determined by the voltage on RS4) or a scaled representation
of the load current (as determined by the voltage drop across the current sense resistor
R8). Switch U5-B controls the amplifier gain. When PB5 is active High, the amplifier out-
put is approximately 5.3 times the low-gain amplifier output (PB5 Low). The Z8F2480
firmware always measures (RS4) voltage using the high-gain setting. Initially, current is
measured using the low-gain setting. When the gain-select switch is set to low gain, the
firmware switches to the high-gain setting when the peak ADC input (PC0) falls below
approximately 220 mV (i.e., corresponding to a load current of approximately 770 mA
RMS). When the gain-select switch is in the high-gain setting, the firmware switches to
the low-gain setting when the peak ADC input (PC0) goes above 1280 mV (i.e., corre-
sponding to a load current of approximately 810 mA RMS).
RD002702-0814
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