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MT92220 Datasheet, PDF (80/210 Pages) Zarlink Semiconductor Inc – 1023 Channel Voice Over IP/AAL2 Processor
Data Sheet
The format of the TX RTP header structure is the following:
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
+0 IPv6 IDE
Identification Counter Source Address [15:2]
+2
RTD
Packet Type
+4
UDP Header Start [9:2]
Header Length [9:2]
+6 Minimum Total Packet Length [7:0]
Link Header Length [7:0]
+8 8P 802.3 Length Adjust [6:0]
802.3 Length Position [7:0]
+A
ID v6 Position [9:2]
+C
Header Word 0
MT92220
Header Word N-1
Figure 46 - TX RTP Header Structure
IPv6
IDE
Field
Identification Counter
Source Address
RTD
Description
This bit must set when the IP version for this connection is 6.
Identification Enable. When ‘1’ the identification dword will be written in the
packet. When ‘0’, the identification dword will be set to an undefined value if it
is present in the headers. IDE should be set when an IPv4 header is present or
when an IPv6 fragmentation header is present.
Points to a 4-byte field in the lower 64K of SSRAM A which will be read as the
identification field that is to be inserted in the packet. When the IDE bit is set,
this 32-bit counter will be incremented and written back to memory. In IPv4
only, the bottom 16 bits of this 32-bit identification counter will be written in the
IPv4 header. This field is ignored when the IDE field is zero.
Routing Destination. This field indicates when packet generated with this
header structure should be set. Multicast destinations are supported through
an ORed combination of the following individual destinations. However, when
packets are sent to the Packet Identifier, they cannot be sent anywhere else.
“000000000” = Delete;
“1xxxxxxxx” = reserved;
“x1xxxxxxx” = TX Link A HP;
“xx1xxxxxx” = TX Link A LP;
“xxx1xxxxx” = TX Link B LP;
“xxxx1xxxx” = TX Link B HP;
“xxxxx1xxx” = reserved;
“xxxxxx1xx” = Network CPU Packet Buffer;
“xxxxxxx1x” = reserved;
“000000001” = Packet Identifier.
Table 35 - Fields and Description
Zarlink Semiconductor Inc.
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