PDSP16515A Datasheet, PDF (7/25 Pages) Mitel Networks Corporation – Stand Alone FFT Processor

PDSP16515A
The internal workspace is double buffered when 256 point
transforms are to be performed. A separate output buffer is
also provided. These resources, together with separate input
and output buses, allow new data to be loaded and old results
to be dumped, whilst the present transform is being computed.
Additional, external, input buffering is not needed to prevent
loss of incoming data whilst a transform is being performed.
When block overlapping is required, internally stored data will
be re-used, and a proportionally smaller number of new
samples need be loaded. Note that the internal window
operator still functions correctly since it is actually applied
during the first pass, and not whilst data is being loaded. The
internal RAM organisation is shown in Fig. 4. It should be
noted that the amount of overlap between I/O transfers and
transforms is completely under the control of the system, since
an input enable signal (INEN) and an output enable (DEN) can
be used to initiate transfers.
In the 1024 point mode there is insufficient workspace for input
and output buffering in addition to working memory. The
device is then configured in a mode with separate load,
transform and dump operations. The internal arrangement is
shown in Fig. 5. The support of an external input buffer is
needed if incoming samples are not to be lost whilst a
transform is in progress. This is loaded at the sample clock
rate and transferred to the FFT processor as quickly as
possible. In this mode the PDSP16515A always expects to
receive 1024 words, regardless of the amount of block
overlapping. Data stored internally cannot be re-used when
block overlapping is required, and data from the external
buffer must be re-read as necessary.
If no incoming data is to remain un-processed, the user must
ensure that the time taken to acquire sufficient data to instigate
a new transform is greater than or equal to the transformation
time itself. The latter can be calculated from Table 4, once the
system clock rate has been defined. When 1024 point
transforms are performed, both the time to read data from the
input buffer, and also the time to dump data, must be included
in the calculation to determine the minimum time in which data
can be loaded into the external buffer.
The peak transfer rate is limited by the characteristics of the I/
O circuits, but can be greater than the sampling rate which is
determined by the transform time. When load and dump
operations are not concurrent with transform operations ( as
in the 1024 point modes ), then the maximum I/O rate is equal
to the system clock rate, Ø. When other transform sizes are
specified, the sampling rate, S, is reduced by a factor F. This
1
DIS
N/2
N
1
N
DATA IN
INEN
VALID
TSD
THD
TSA
THA
TSI
THI
LFLG
INEN
Edge activated
system
TFH
Min Time =THA
50% Overlap
TFL
TFL
TFH
TSA
TED
Characteristic
Symbol
Min
Max
Data In set up Time
T_SD
Data In Hold Time
T_HD
INEN active going set up
T
SA
INEN active Hold Time
T
HA
INEN in-active Hold Time to ensure no load
T_HI
INEN in-active going set up for no load operation
T_SI
Delay to LFLG going active ( 30 pf load )
T_FH
Delay to LFLG going in-active ( 30 pf load )
T_FL
Min time to INEN low in edge mode
T_ED
10
0
8
0
2
8
18
18
15
Table 1. Advanced Timing Information with Continuous Inputs.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
7