PDSP16515A Datasheet, PDF (22/25 Pages) Mitel Networks Corporation – Stand Alone FFT Processor

PDSP16515A
(a) 2 cycles in every 12 are dedicated to reading new
information in the input buffer and writing it to the RAM.
(b) 2 cycles in every 12 are dedicated to reading the contents
of the RAM and advancing that data to the output buffer.
(c) 8 cycles in every 12 are dedicated to the read and write
operations of the transform currently being calculated.
Sequence of Eventa
The sequence of events relating to the output control and data
flow is as follows :
(3.1) An SCLK rising edge :
(a) An internal flag is raised to indicate that the transform has
finished and data is available to be dunped. Data will be
present in the internal RAM, and the output address
generator will be at the cortrect address. Access to the
RAM at this moment, however, has not been made.
(b) If at this moment the device is programmed to be a single
device, and DEN is inactive, then DAV will be made active
- ie without the presence of DOS. If DEN is active at this
point, or the device is programmed in any multiple device
mode, then DAV will remain inactive.
(3.2) Accessing the RAM at this point
At this moment, when DAV has been made active before data
appears on the output pins, data is not yet in the output buffer.
Internally the precise SCLK cycle at which the RAMs are read
and written to the output buffers now has to be waited for. This
cycle, as described above ocurrs 2 in every 12 SCLK cycles,
so at worst case 6 SCLK cycles have to elapse until data is
guaranteed to be in the output buffer.
If the DOS rate is similar to the SCLK rate, and the user has
been immediately applying DOS pulses (on seeing DAV go
active) hoping to get data off the chip, then this will not actually
happen.
The next internal flag raised is the one which indicates that the
output data has been successfully read from the RAMs and is
now in the output buffer.
(3.3) The next DOS rising edge (regardless of DEN status) :
The flag indicating that the RAMs have been read is
transferred to circuitry operating on DOS. The output enable
signal, DEN, does not have to be present at this point.
(3.4) The next DEN-Enabled DOS rising edge (ie the 1st one
of this sequence)
The output state machine receives it's first edge.
(3.5) The next DEN-Enabled DSO rising edge (ie the 2nd)
Internal output address generators start to count (ready for
fetching the next set of output data).
(3.6) The next DEN-Enabled DOS rising edge (ie the 3rd)
An enable signal is raised for the final data latch in the output
buffer.
(3.7) The next DEN-Enabled DOS rising edge (ie the 4th)
(a) The final data in the output buffer latch clocks-through new
data and presents it to the output pads.
(b) The output pads come oput of high impedance.
(c) If DAV was previously inactive, it is now made active.
Output Scenarios
Considering the above sequence, therefore, some single
device situations can now be explained :
(4.1) DOS is continuously present, but DEN is inactive
(Transform size less than 1024)
In this case, when the transform is complete, as the device is
programmed as a single device and DEN is inactive, DAV will
be made active. Even though DOS is running, the status of
DAV at this point does not rely on it.
The user can now monitor the status of DAV, and after at least
6 SCLK cycles can initiate some further action, eg by external
control force DEN active at some later time when the rest of the
system is ready to accept the transformed data.
Independently of this external control, the next DOS pulse will
start to operate the sequence of events as described above (ie
point No. 3.3). When DEN is eventually made active, the
remainder of the above sequence (points Nos 3.4 to 3.7) is
executed, with 4 DEN-Enabled DOS pulses needed before
data is observed on the output pins.
If however the user immediately forces DEN active upon
monitoring DAV go active and waiting for the required 6 SCLK
cycles, then 5 DOS pulses would have to be issued. The first
of these 5 would start the sequence of events as described
above (3.3), and the fact that it is enabled by DEN would be
irrelevant. The required DEN enabled pulses in this situation
would be the 2nd, 3rd, 4th and 5th pulses supplied.
(4.2) DOS is not running, and DEN is inactive. (Transform
sizes less than 1024)
In this situation, again as the device is programmed to be a
single device and DEN is inactive at the point where the
transform is complete, DAV will be made active regardless of
the state of DOS. The user can now monitor this event on DAV
and after waiting a further 6 SCLK cycles, use it to switch on
DOS and to make DEN active.
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