MT90883 Datasheet, PDF (52/97 Pages) Zarlink Semiconductor Inc – TDM to Packet Processors

MT90880/1/2/3
Data Sheet
The maximum size of the jitter buffer is governed by the drop threshold described above. When the drop
threshold is reached, any further packets arriving are discarded until the buffer depth has reduced by being
played out of the TDM interface.
If the interface is overunning because of a difference in frequency between the TDM clocks at either end of the
network, the overrun causes packets to be discarded at a constant interval, depending on the size of the
frequency discrepancy. For example, if the frequency difference was 50 ppm, a packet will be discarded every
20,000 packets. However, since packets may contain multiple TDM frames, this may cause a more noticeable
disturbance in the data stream than in the underrun case, where only a single frame slip occurs.
If the underrun is being caused by a large PDV in the network, the overrun cause the depth of the jitter buffer to
be limited to the maximum size, as described above.
6.5 Queue Manager
The Queue Manager is responsible for admission control, linking/dropping, and scheduling incoming packets
either from WAN side, packet interfaces or from the PCI Interface.
The Queue Manager provides a full spectrum of QoS (Quality of Service) features. For traffic queued to the
packet interface, the Queue Manager provides four different priority levels. These can be managed either on a
strict priority basis, or using Weighted Fair Queuing (WFQ).
Similarly, the packet classifier can be used to direct traffic to four separate PCI interface queues. The host
processor is responsible for managing the relative priority of each of these queues.
For traffic queued towards the WAN interface, each separate packet stream or context is managed in a
separate queue. The Queue Manager sets a programmable limit on the maximum number of packets in an
individual context queue. This provides a means of detecting when the egress port has become broken, leading
to the queues starting to fill up. Beyond the limit, incoming packets are dropped to avoid the memory becoming
full, and therefore causing problems to the remaining contexts.
Features include:
• Four separate queues to each port on the packet interface
• Queue disciplines on packet interface are:
• Weighted Fair Queuing with programmable weights
• Strict Priority
• Separate queue for each WAN context
• Programmable drop threshold when queues get too big
• Four traffic classes on incoming packets
• Four separate queues to the PCI interface (host is responsible for any priority scheme)
6.5.1 Queues to the Packet Interface
The MT9088x family has four queues to each port of the packet interface. Each queue is used to provide a
different class of service. TDM traffic from the WAN or Local interfaces can be allocated to a particular queue
and port on a per-context basis. Similarly, packets from the CPU interface can be directed to any one of the
queues and ports.
Classes of Service
The MT9088X uses two methods of queue control to provide for different classes of service: Strict Priority (SP),
and Weighted Fair Queuing (WFQ). The queue disciplines can be allocated flexibly across the four different
queues, as shown in Table 7.
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