MT90871 Datasheet, PDF (38/65 Pages) Zarlink Semiconductor Inc – Flexible 8K Digital Switch (F8KDX)

MT90871
Data Sheet
Bit
Name RESET
Description
8 SBERRXB
0
Start Bit Error Rate Receiver for Backplane.
A LOW to HIGH transition enables the Backplane BER receiver. The receiver
monitors incoming data for reception of the seed value. When detected, the
LOCK state is indicated (LOCKB) and the receiver compares the incoming bits
with the reference generator for bit equality and increments the Backplane Bit
error Register (BBCR) on each failure. When set LOW, bit comparison is
disabled and the error count is frozen. The error count is stored in the
Backplane Bit Error Register (BBCR).
7 SBERTXB
0
Start Bit Error Rate Transmitter for Backplane.
A LOW to HIGH transition starts the BER transmission. When set LOW,
transmission is disabled.
6 PRBSB
0
BER Mode Select for Backplane.
When set HIGH, a PRBS sequence of length 2²³-1 is selected for the
Backplane port. When set LOW, a PRBS sequence of length 2¹⁵-1 is selected
for the Backplane port.
5 LOCKL
0
Local Lock (READ ONLY).
This bit is automatically set HIGH when the receiver has locked to the
incoming data sequence. The bit is reset by a LOW to HIGH transition on
SBERRXL
4 PRSTL
0
PBER Reset for Local.
A LOW to HIGH transition initializes the Local BER generator to the seed
value.
3 CBERL
0
Clear Bit Error Rate Register for Local.
A LOW to HIGH transition resets the Local internal bit error counter and the
Local bit error (LBERR) register to zero.
2 SBERRXL
0
Start Bit Error Rate Receiver for Local.
A LOW to HIGH transition enables the Local BER receiver. The receiver
monitors incoming data for reception of the seed value. When detected, the
LOCK state is indicated (LOCKL) and the receiver compares the incoming bits
with the reference generator for bit equality and increments the Local Bit error
Register (LBCR) on each failure. When set LOW, bit comparison is disabled
and the error count is frozen. The error count is stored in the Local Bit Error
Register (LBCR).
1 SBERTXL
0
Start Bit Error Rate Transmitter for Local.
A LOW to HIGH transition enables the Local BER transmission. When set
LOW, transmission is disabled.
0 PRBSL
0
BER Mode Select for Local.
When set HIGH, a PRBS sequence of length 2²³-1 is selected for the Local
port. When set LOW, a PRBS sequence of length 2¹⁵-1 is selected for the
Local port.
Table 15- Bit Error Rate Test Control Register (BERCR) Bits (continued)
38
Zarlink Semiconductor Inc.