MT90871 Datasheet, PDF (15/65 Pages) Zarlink Semiconductor Inc – Flexible 8K Digital Switch (F8KDX)

Data Sheet
MT90871
FP8o
C8o
BSTi0-15/LSTi0-15
Bit Delay = 0
(Default)
BSTi0-15/LSTi0-15
Bit Delay = 1/4
BSTi0-15/LSTi0-15
Bit Delay = 1/2
BSTi0-15/LSTi0-15
Bit Delay = 3/4
BSTi0-15/LSTi0-15
Bit Delay = 1
Ch255
3
2
1
0
Ch0
7
6
5
43
2
1
0
7
Ch1
6
5
4
Bit Delay, 1/4
Ch255
Ch0
Ch1
3
2
1
0
7
6
5
43
2
1
0
7
6
5
4
Bit Delay, 1/2
Ch255
Ch0
Ch1
3
2
1
0
7
6
5
43
2
1
0
7
6
5
4
Ch255
3
2
1
0
Bit Delay, 3/4
Ch0
7
6
5
43
2
1
0
7
Ch1
6
5
4
Ch255
3
2
1
0
Bit Delay, 1
Ch0
7
6
5
4
3
2
1
0
Ch1
7
6
5
BSTi0-15/LSTi0-15
Bit Delay = 7 1/2
BSTi0-15/LSTi0-15
Bit Delay = 7 3/4
Ch254
Ch255
Bit Delay, 7 1/2
Ch0
2
1
0
7
6
5
43
2
1
0
7
6
5
4
Ch254
Ch255
Bit Delay, 7 3/4
Ch0
2
1
0
7
6
5
43
2
1
0
7
6
5
4
Figure 10 - Backplane and Local Input Bit Delay Timing Diagram for Data Rate of 16Mb/s
Zarlink Semiconductor Inc.
15