MT90871 Datasheet, PDF (33/65 Pages) Zarlink Semiconductor Inc – Flexible 8K Digital Switch (F8KDX)

Data Sheet
MT90871
Bit
Name
Description
7-0 BCAB7-0 Source Channel Address Bits.
The binary value of these 8 bits represents the input channel number when BMM is set LOW.
Transmitted as data when BMM is set HIGH.
Table 11- BCM Bits for Local-to-Backplane and Backplane-to-Backplane Switching (continued)
12.5
Internal Register Mappings
A14 - A0
Register
0000_H
0001_H
0002_H
0003_{H -} 0012_H
0023_{H -} 0032_H
0043_{H -} 0052_H
0063_{H -} 0072_H
0083_{H -} 0092_H
00A3_{H -} 00B2_H
00C3_H
00C4_H
00C5_H
00C6_H
00C7_H
00C8_H
00C9_H
00CA_H
00CB_H
00CC_H
00CD_{H -} 00DC_H
00ED_{H -} 00FC_H
010D_{H -} 011C_H
012D_{H -} 013C_H
014D_H
3FFF_H
Control Register, CR
Block Programming Register, BPR
BER Control Register, BERCR
Local Input Channel Delay Register 0, LCDR0 - Register 15, LCDR15
Local Input Bit Delay Register 0, LIDR0 - Register 15, LIDR15
Backplane Input Channel Delay Register 0, BCDR0 - Register 15, BCDR15
Backplane Input Bit Delay Register 0, BIDR0 - Register 15, BIDR15
Local Output Advancement Register 0, LOAR0 - Register 15, LOAR15
Backplane Output Advancement Register 0, BOAR0 - Register 15, BOAR15
Local BER Start Send Register, LBSSR
Local Transmit BER Length Register, LTXBLR
Local Receive BER Length Register, LRXBLR
Local BER Start Receive Register, LBSRR
Local BER Count Register, LBCR
Backplane BER Start Send Register, BBSSR
Backplane Transmit BER Length Register, BTXBLR
Backplane Receive BER Length Register, BRXBLR
Backplane BER Start Receive Register, BBSRR
Backplane BER Count Register, BBCR
Local Input Bit rate Register 0, LIBRR0 - Register 15, LIBRR15
Local Output Bit rate Register 0, LOBRR0 - Register 15, LOBRR15
Backplane Input Bit rate Register 0, BIBRR0 - Register 15, BIBRR15
Backplane Output Bit rate Register 0, BOBRR0 - Register 15, BOBRR15
Memory BIST Register, MBISTR
Revision control register, RCR
Table 12- Address Map for Register (A14 = 0)
Zarlink Semiconductor Inc.
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