ZL50015_06 Datasheet, PDF (28/122 Pages) Zarlink Semiconductor Inc – Enhanced 1 K Digital Switch with Stratum 4E DPLL

ZL50015
Data Sheet
CKOFPO0EN = 1
FPO0P = 0
FPO0POS = 0
CKOFPO0EN = 1
FPO0P = 1
FPO0POS = 0
CKOFPO0EN = 1
FPO0P = 0
FPO0POS = 1
CKOFPO0EN = 1
FPO0P = 1
FPO0POS = 1
CKOFPO4EN = 1
CKO4P = 0
CKO4SEL = 0
CKo4 = 2.048 MHz
CKO4EN = 1
CKO4P = 1
CKO4SEL = 0
CKo4 = 2.048 MHz
CKOFPO4EN = 1
CKO4P = 0
CKO4SEL = 1
CKo4 = 1.544 MHz
CKO4EN = 1
CKO4P = 1
CKO4SEL = 1
CKo4 = 1.544 MHz
Note:
While there is no frame pulse output directly tied to the CKo4, the output clocks are based on the frame pulse generated by FPo0
Figure 11 - Output Timing for CKo4
FPo5 (FPo_OFF2)
FP19EN = 1
CKO5EN = 1
CK5 = 19.44 MHz
Figure 12 - Output Timing for CKo5 and FPo5 (FPo_OFF2)
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Zarlink Semiconductor Inc.