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YMF781 Datasheet, PDF (8/14 Pages) YAMAHA CORPORATION – APL-1 Automobile sound PLayer-1
YMF781
●AC Characteristics
Input/Output level measurement conditions:
(unless otherwise specified)
VIH = 0.75 × VDD or 0.75 × VDDC
VIL = 0.25 × VDD or 0.25 × VDDC
VOH = 0.75 × VDD or 0.75 × VDDC
VOL = 0.25 × VDD or 0.25 × VDDC
・Reset and Clock Timing
RSTN, XI, and other input signals
Item
Symbol ï¼­in. ï¼´yp. ï¼­ax.
RSTN “L” pulse width
(When in power-up and in shut-down-cancel)
(When power supply and clock is in stable)
TRSTW
20
100
RSTN (undefined→L) set-up time
TRSTS
0
VDD→VDDC power up time difference
TVSKW
0
3
XI Frequency
1 / TXFREQ
6.144
XI Rising time and Falling time
TXR , TXF
20
XI High time
TXH
60
XI Low time
TXL
60
XI Input delay time
TXIIN
1
XI Input time
TXIINW
1
Internal clock frequency
1/TCW
18.432
Input signals except XI Rising time and Falling time
TR, TF
15
Conditions: TOP= -40 to 85℃, VDD= 3.0 to 3.6V, VDDC= 3.0 to 3.6V or 4.75 to 5.25V, Capacitor load=50pF
・Clock input to the XI terminal is necessary during the reset.
・Be sure to power VDD first when independent power supply is used for the supply of VDD and VDDC.
ï¼µnit
ms
μs
μs
ms
MHz
ns
ns
ns
ms
ms
MHz
ns
VDDC
The minimum of
recommended
operating voltage.
50%
TVSKW
VDD
RSTN
XI
50%
TRSTS
TXIIN
TRSTW
TXIINW
VIL= 0.25*VDD
The reset width is defined from a point that VDDC reaches to the minimum of recommended operating voltage.
RSTN input must be "L" level at the point where VDD reaches to 50%.
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