YMF754 Datasheet, PDF (5/60 Pages) YAMAHA CORPORATION – DS-1E

YMF754
PIN DESCRIPTION
1. PCI Bus Interface (54-pin)
Name
PCICLK
RST#
AD[31:0]
C/BE[3:0]#
PAR
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
DEVSEL#
REQ#
GNT#
PCREQ#
PCGNT#
PERR#
SERR#
INTA#
SERIRQ#
CLKRUN#
I/O Type
I
P
I
P
IO Ptr
IO Ptr
IO Ptr
IO Pstr
IO Pstr
IO Pstr
IO Pstr
I
P
IO Pstr
O
P
I
P
O Ptr
I
Ptr
IO Pstr
O Pod
O Pod
IO Ptr
IO Ptr
Size
Function
- PCI Clock
- Reset
- Address / Data
- Command / Byte Enable
- Parity
- Frame
- Initiator Ready
- Target Ready
- Stop
- ID Select
- Device Select
- PCI Bus Master Request
- PCI Bus Master Grant
- PC/PCI Request
- PC/PCI Grant
- Parity Error
- System Error
- Interrupt signal output for PCI Bus
- Serialized IRQ
- Clock Run
2. AC’97 Interface (8-pin)
Name
CRST#
CMCLK
CBCLK
CSDO
CSYNC
CSDI0
CSDI1
DOCKEN#
I/O Type
O
T
O
C
I
T
O
T
O
T
I
T
I Tup
I Tup
Size
6mA
-
-
6mA
6mA
-
-
-
Function
Reset signal for AC’97
Master Clock for AC’97 (24.576MHz)
AC-link: Bit Clock for AC’97 audio data
AC-link: AC’97 Serial audio output data
AC-link: AC’97 Synchronized signal
AC-link: AC’97 Serial audio input data (Primary)
AC-link: AC’97 Serial audio input data (Secondary)
Secondary AC’97 Enable
June 28, 1999
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