YMF724F Datasheet, PDF (4/50 Pages) YAMAHA CORPORATION – high performance audio controller for the PCI Bus

YMF724F
PIN DESCRIPTION
1. PCI Bus Interface (53-pin)
name
PCICLK
RST#
AD[31:0]
C/BE[3:0]#
PAR
FRAME#
IRDY#
TRDY#
STOP#
IDSEL
DEVSEL#
REQA#
GNTA#
PCREQ#
PCGNT#
PERR#
SERR#
INTA#
SERIRQ#
I/O Type
I
P
I
P
IO Ptr
IO Ptr
IO Ptr
IO Pstr
IO Pstr
IO Pstr
IO Pstr
I
P
IO Pstr
O
P
I
P
O Ptr
I
Ptr
IO Pstr
O Pod
O Pod
IO Ptr
Size
function
PCI Clock
Reset
Address / Data
Command / Byte Enable
Parity
Frame
Initiator Ready
Target Ready
Stop
ID Select
Device Select
PCI Request
PCI Grant
PC/PCI Request
PC/PCI Grant
Parity Error
System Error
Interrupt signal output for PCI bus
Serialized IRQ.
2. AC’97 Interface (6-pin)
Name
CRST#
CMCLK
I/O Type
O
T
O
C
CBCLK
CSDO
CSDI
CSYNC
I
T
O
T
I
T
O
T
Size
6mA
-
-
6mA
-
6mA
function
Reset signal for AC’97
Master Clock of AC link (24.576MHz) and
AC3F2
AC-link: Bit Clock for AC’97 audio data
AC-link: AC’97 Serial audio output data
AC-link: AC’97 Serial audio input data
AC-link: Synchronized signal
January 14, 1999
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