DS880 Datasheet, PDF (5/7 Pages) Xilinx, Inc – Video Broadcaster v1.00a

Video Broadcaster v1.00a
aresetn
The aresetn signal must be synchronous to the aclk and must be held low for a minimum of 32 clock cycles of the
slowest clock.
Data Interface
The Video Broadcaster core receives and transmits data using AXI4-Stream interfaces that implement a video
protocol as defined in the Video IP: AXI Feature Adoption section of the AXI Reference Guide (UG761) [Ref 1].
AXI4-Stream Signal Names and Descriptions
Table 3 describes the AXI4-Stream inbound signal names and descriptions.
Table 3: AXI4-Stream Data Interface Signal Descriptions
Signal Name
Direction
Width
s_axis_tdata
In
8,16,24,32,40,48,56,64
s_axis_tvalid
In
1
s_axis_tready
Out
1
s_axis_tuser
In
1
s_axis_tlast
In
1
Description
Input Video Data
Input Video Valid Signal
Input Ready
Input Video Start Of Frame
Input Video End Of Line
Table 4 describes the AXI4-Stream outbound signal names and descriptions.
Table 4: AXI4-Stream Data Interface Signal Descriptions
Signal Name
Direction
Width
m[nn]_axis_tdata
Out
8,16,24,32,40,48,56,64
m[nn]_axis_tvalid
Out
1
m[nn]_axis_tready
In
1
m[nn]_axis_tuser
Out
1
m[nn]_axis_tlast
Out
1
Description
Interface [nn] Output Video Data
Interface [nn] Output Video Valid
Interface [nn] Output Video Ready
Interface [nn] Output Video Start of Frame
Interface [nn] Output Video End of Line
Note: The number of outbound interfaces is configurable via the C_NUM_MI_SLOTS parameter. Each of the outbound
interfaces must be identical and the "[nn]" designation indicates the port.
Video Data
The AXI4-Stream interface specification restricts TDATA widths to integer multiples of 8 bits. The Video Broadcaster
*_axis_tdata is packed and padded to multiples of 8 bits as necessary. Zero padding the most significant bits is
only necessary for 10 and 12 bit wide data.
READY/VALID Handshake
A valid transfer occurs whenever READY, VALID, and aresetn are high at the rising edge of aclk, as seen in
Figure 4. During valid transfers, DATA only carries active video data. Blank periods and ancillary data packets are
not transferred through the AXI4-Stream video protocol.
DS880 October 16, 2012
www.xilinx.com
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Product Specification