DS880 Datasheet, PDF (3/7 Pages) Xilinx, Inc – Video Broadcaster v1.00a

X-Ref Target - Figure 2
Video Broadcaster v1.00a
Figure 2: Handshake Management
Latency
The Video Broadcaster core has a combinational inbound valid to outbound valid path and no latency is
introduced. When not all outbound interfaces are ready, inbound back pressure is applied.
Throughput
The Video Broadcaster core reduces throughput relative to the inbound and outbound channels. It throttles the
inbound channel based on the outbound availability. If all outbound channels are always ready, there is not any
reduction in throughput.
Parameterization
Table 1 describes the core parameters.
Table 1: Video Broadcaster Parameters
Parameter Name Default Value
Allowable Values
C_AXIS_TDATA_WIDTH
32
8,16,24,32,40,48,56,64
C_NUM_MI_SLOTS
2
2 - 16
Description
Width of the each of the TDATA ports
Number of Video Master slots on which the inbound
video is replicated.
Core Interfaces
Port Descriptions
The Video Broadcaster core is compliant with the AXI4-Stream Video Protocol standard. Figure 3 illustrates an I/O
diagram of the Video Broadcaster core.
DS880 October 16, 2012
www.xilinx.com
3
Product Specification