DS447 Datasheet, PDF (4/5 Pages) Xilinx, Inc – Data-Side OCM BRAM

Data-Side OCM BRAM (DSBRAM) Interface Controller (v3.00c)
Allowable Parameter Combinations
There are no restrictions on allowed parameter combinations.
Parameter - Port Dependencies
There are no dependencies between ports and parameters.
Data Side OCM BRAM Interface Controller Register Descriptions
There are no registers on the core.
Data Side OCM BRAM Interface Controller Interrupt Descriptions
There are no interrupt signals on the core.
Design Implementation
Design Tools
The Data Side OCM BRAM Interface Controller design is handwritten.
XST is the synthesis tool used for this device.
Target Technology
The target technology is a Virtex-4 FX FPGA.
Device Utilization and Performance Benchmarks
Not available.
Specification Exceptions
Not applicable.
Reference Documents
UG018 PowerPC 405 Processor Block Reference Guide
DS480 Data Side OCM Bus Data Sheet
DS444 Block RAM Block Data Sheet
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DS447 June 24, 2009
Product Specification