DS612 Datasheet, PDF (3/8 Pages) Xilinx, Inc – LogiCORE IP OBSAI v5.1

LogiCORE IP OBSAI v5.1
Functional Description
Figure 2 illustrates a block diagram of the OBSAI RP3-01 core implementation.
X-Ref Target - Figure 2
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RP3 Clock Control
RP3 Client
RP1
Frame Sync
HW Reset
Ethernet
Data &
Control
MUX
Framer
D _{RTT Gen}
RTT Chk
Sync
FSM
GTP
or
GTX
RP3
is_RP1
HW Reset
Ethernet
Data &
Control
MUX
De-
framer
Frame Sync
cRP3 Client
16
o^{Figure 2: OBSAI Core Implementation}
The major functional blocks of the core include:
n • Transmit Data and Control Multiplexer. Inserts Control Messages in the RP3 data stream during control slots
or empty data slots if permitted.
t _{• Transmit RP3-01 Control Interfaces. Ethernet, O&M, and Timing Synchronizations Messages can be inserted}
i ^{in the RP3 data stream.}
n • Transmit RP3 Generic Message Interface. Allows the transmission of Application Layer generated RP3
messages such as Generic Control or Generic Packet types.
• RP3 Transmit Framer. Creates a single stream to the device-specific transceiver.
u _{• RP3 Receive De-framer. Extracts messages from the data from the device-specific transceiver.}
• Receive Data and Control Demultiplexer. Extracts Control messages from the stream and passes them to the
e _{RP3-01 control interfaces.}
• ReceiveRP3-01 Control Interfaces. Extracts the Ethernet, O&M, and Frame Clock Burst data from the Control
d ^Messages.
• Receive RP3 Generic Message Interface. Extracts selected RP3 message types such as Generic Control or
Generic Packet types and passes them to a separate interface for Application Layer use.
• Clock Control. Manages the switching of the GTP or GTX transceiver speed and generates the correct clocks to
IP _{the other parts of the core and to the higher-layer logic created by the user.}
DS612 March 1, 2011
www.xilinx.com
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Product Specification