XC6VCX75T Datasheet, PDF (23/52 Pages) Xilinx, Inc – Virtex-6 CXT Family Data Sheet

Virtex-6 CXT Family Data Sheet
Ethernet MAC Switching Characteristics
Consult Virtex-6 FPGA Embedded Tri-mode Ethernet MAC User Guide for further information.
Table 33: Maximum Ethernet MAC Performance
Symbol
Description
F_TEMACCLIENT Client interface maximum frequency
F_TEMACPHY
Physical interface maximum frequency
Conditions
10 Mb/s – 8-bit width
100 Mb/s – 8-bit width
1000 Mb/s – 8-bit width
1000 Mb/s – 16-bit width
10 Mb/s – 4-bit width
100 Mb/s – 4-bit width
1000 Mb/s – 8-bit width
Speed Grade
-2
2.5⁽¹⁾
25⁽²⁾
-1
2.5⁽¹⁾
25⁽²⁾
125
125
62.5
62.5
2.5
2.5
25
25
125
125
Notes:
1. When not using clock enable, the F_MAX is lowered to 1.25 MHz.
2. When not using clock enable, the F_MAX is lowered to 12.5 MHz.
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Integrated Interface Block for PCI Express Designs Switching Characteristics
More information and documentation on solutions for PCI Express designs can be found at:
http://www.xilinx.com/technology/protocols/pciexpress.htm
Table 34: Maximum Performance for PCI Express Designs
Symbol
F_PIPECLK
F_USERCLK
F_DRPCLK
Description
Pipe clock maximum frequency
User clock maximum frequency
DRP clock maximum frequency
Speed Grade
-2
-1
125
125
250
250
250
250
Units
MHz
MHz
MHz
DS153 (v1.6) February 11, 2011
www.xilinx.com
Product Specification
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