XC6VCX75T Datasheet, PDF (21/52 Pages) Xilinx, Inc – Virtex-6 CXT Family Data Sheet

Virtex-6 CXT Family Data Sheet
Table 30: GTX Transceiver User Clock Switching Characteristics⁽¹⁾
Symbol
Description
Conditions
F_TXOUT
TXOUTCLK maximum frequency
F_RXREC
T_RX
RXRECCLK maximum frequency
RXUSRCLK maximum frequency
T_RX2
RXUSRCLK2 maximum frequency
T_TX
TXUSRCLK maximum frequency
T_TX2
TXUSRCLK2 maximum frequency
Internal 20-bit data path
Internal 16-bit data path
Internal 20-bit data path
Internal 16-bit data path
1 byte interface
2 byte interface
4 byte interface
1 byte interface
2 byte interface
4 byte interface
Speed Grade
-2
-1
187.5
187.5
234.38
234.38
187.5
187.5
234.38
234.38
234.38
234.38
376
312.5
234.38
234.38
117.19
117.19
234.38
234.38
376
312.5
234.38
234.38
117.19
117.19
Notes:
1. Clocking must be implemented as described in Virtex-6 FPGA GTX Transceivers User Guide.
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Table 31: GTX Transceiver Transmitter Switching Characteristics
Symbol
Description
Condition
F_GTXTX
T_RTX
T_FTX
T_LLSKEW
V_TXOOBVDPP
T_{TXOOBTRANSITION}
T_J3.75
D_J3.75
T_J3.125
D_J3.125
T_J3.125L
D_J3.125L
T_J2.5
D_J2.5
T_J1.25
D_J1.25
T_J600
D_J600
Serial data rate range
TX Rise time
TX Fall time
TX lane-to-lane skew⁽¹⁾
Electrical idle amplitude
Electrical idle transition time
Total Jitter⁽²⁾⁽³⁾
Deterministic Jitter⁽²⁾⁽³⁾
Total Jitter⁽²⁾⁽³⁾
Deterministic Jitter⁽²⁾⁽³⁾
Total Jitter⁽²⁾⁽³⁾
Deterministic Jitter⁽²⁾⁽³⁾
Total Jitter⁽²⁾⁽³⁾
Deterministic Jitter⁽²⁾⁽³⁾
Total Jitter⁽²⁾⁽³⁾
Deterministic Jitter⁽²⁾⁽³⁾
Total Jitter⁽²⁾⁽³⁾
Deterministic Jitter⁽²⁾⁽³⁾
20%–80%
80%–20%
3.75 Gb/s
3.125 Gb/s
3.125 Gb/s⁽⁴⁾
2.5 Gb/s⁽⁵⁾
1.25 Gb/s⁽⁶⁾
600 Mb/s
Min
0.480
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Typ
Max Units
–
F_GTXMAX Gb/s
120
–
ps
120
–
ps
–
350
ps
–
15
mV
–
75
ns
–
0.34
UI
–
0.16
UI
–
0.2
UI
–
0.1
UI
–
0.35
UI
–
0.16
UI
–
0.20
UI
–
0.08
UI
–
0.15
UI
–
0.06
UI
–
0.1
UI
–
0.03
UI
DS153 (v1.6) February 11, 2011
www.xilinx.com
Product Specification
21