DS483 Datasheet, PDF (2/5 Pages) Xilinx, Inc – Configurable size of the input and output bus

Utility Flip-Flop (v1.10a)
Functional Description
Figure 1 shows a Utility Bus Flip-Flop in a system.
X-Ref Target - Figure 1
Peripheral 1
Peripheral 3
Peripheral 2
DQ
Flip-Flop
DS483_01_100609
Figure 1: Utility Bus Split in a System
Utility Flip-Flop Parameters
Table 1: Utility Bus Split Parameters
Parameter
Description
C_USE_RST
When C_USE_RST=1, the input signal “Rst” is connected as the “reset” or
“clear” signal of the flip-flop depending on the value of C_USE_ASYNCH.
When C_USE_RST=0, the input signal “Rst” is not used.
C_SET_RST_HIGH
When C_SET_RST_HIGH = 1, the inputs Rst and Set is active high.
When C_SET_RST_HIGH = 0, the inputs Rst and Set are active low.
C_USE_SET
When C_USE_SET=1, the input signal “Set” is connected as the “preset” or
“set” signal of the flip-flop, depending on the value of C_USE_ASYNCH.
When C_USE_SET=0, the input signal “Set” is not used.
C_USE_CE
When C_USE_CE = 1, the input signal “CE” is connected as the “CE” (clock
enable) of the flip-flop.
When C_USE_CE = 0, the input signal CE is not used.
C_USE_ASYNCH
When C_USE_ASYNCH = 1, the FDCPE (D Flip-Flop with Clock Enable and
Asynchronous Preset and Clear) is inferred.
When C_USE_ASYNCH = 0, the FDRSE (D Flip-Flop with Clock Enable and
Synchronous Reset and Set) is inferred.
C_SIZE
The size of the vectors. Notice that the width of D and Q must be equal. The
minimum value of this parameter is 1.
C_INIT
Initial startup value of flipflop, i.e. before set, reset or load operation
Type
Integer
Integer
Integer
Integer
Integer
Integer
String
Allowable Parameter Combinations
C_INIT is a string of binary values defining the initial state of the utility flip-flop. The left most bit in the
string is assigned to the flip-flop driving D[0], the following bit to the flip-flop driving D[1], and so on.
When C_INIT is set to the value "0" or "1", all flip-flops will have the initial value "0" or "1", respectively.
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DS483 December 2, 2009
Product Specification