DS848 Datasheet, PDF (1/9 Pages) Xilinx, Inc – LogiCORE IP Virtex-6 FPGA Triple-Rate SDI v1.0

DS848 June 22, 2011
LogiCORE IP Virtex-6 FPGA
Triple-Rate SDI v1.0
Product Specification
Introduction
The LogiCORE™ IP Virtex®-6 FPGA Triple-Rate SDI
interface solution provides receiver and transmitter
interfaces for the SMPTE SD-SDI, HD-SDI, and 3G-SDI
standards. The Virtex-6 FPGA Triple-Rate SDI receiver
and transmitter are provided as unencrypted source
code in both Verilog and VHDL, allowing the user to
fully customize these interfaces as required by specific
applications.
Features
• Standards compliance:
• SMPTE 259 (SD-SDI)
• SMPTE 292 (HD-SDI)
• SMPTE 372 (Dual Link HD-SDI)
• SMPTE 424 and 425 (3G-SDI) including levels A,
B-DL, and B-DS
• SMPTE 352 (Payload ID)
• SMPTE RP-165 (SD-SDI EDH)
• Triple-Rate SDI receiver features:
• A single reference clock frequency supports
reception of five different bit rates:
- 270 Mb/s SD-SDI
- 1.485 Gb/s HD-SDI
- 1.485/1.001 Gb/s HD-SDI
- 2.97 Gb/s 3G-SDI
- 2.97/1.001 Gb/s 3G-SDI
• Automatically detects incoming SDI standard
and bit rate
• Automatically detects video transport format
• Detects and captures SMPTE 352 packets
• Checks for CRC errors for HD-SDI and 3G-SDI
• Optionally checks for EDH errors for SD-SDI
• Triple-Rate SDI transmitter features:
• Only two reference clock frequencies are required
to transmit five different bit rates:
- 270 Mb/s SD-SDI
- 1.485 Gb/s HD-SDI
- 1.485/1.001 Gb/s HD-SDI
- 2.97 Gb/s 3G-SDI
- 2.97/1.001 Gb/s 3G-SDI
• Generates and inserts CRC and line numbers for
HD-SDI and 3G-SDI
• Generates and inserts EDH packets for SD-SDI
• Generates and inserts SMPTE 352 packets for all
SDI standards
LogiCORE IP Facts Table
Core Specifics
Supported
Device Family⁽¹⁾
Minimum
Support Speed
Grade
Supported
Transceivers
Resources
Used
Virtex-6 Family
-1
GTX Transceivers
Provided with Core
See Table 1
Documentation
Design Files
Example Design
Test Bench
Constraints File
Product Specification
User Guide
Verilog and VHDL source code
Not Provided
Not Provided
Not Provided
Tested Design Tools
Supported HDL
Verilog and VHDL
Synthesis Tools
XST 13.2
Xilinx Tools
ISE 13.2 software
Simulation Tools
Mentor Graphics ModelSim 6.6d
Support
Provided by Xilinx @ www.xilinx.com/support
1. For a complete listing of supported devices, see the release notes
for this core.
© Copyright 2011 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included herein are trademarks of Xilinx in
the United States and other countries. All other trademarks are the property of their respective owners.
DS848 June 22, 2011
www.xilinx.com
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Product Specification