X28HC64 Datasheet, PDF (5/24 Pages) Xicor Inc. – 5 Volt, Byte Alterable E2PROM

X28HC64
THE TOGGLE BIT I/O₆
Figure 4. Toggle Bit Bus Sequence
LAST
WE ^WRITE
CE
OE
I/O6
VOH
*
VOL
* Beginning and ending state of I/O6 will vary.
Figure 5. Toggle Bit Software Flow
LAST WRITE
LOAD ACCUM
FROM ADDR n
COMPARE
ACCUM WITH
ADDR n
HIGH Z
*
X28HC64
READY
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The Toggle Bit can eliminate the software housekeeping
chore of saving and fetching the last address and data
written to a device in order to implement DATA Polling.
This can be especially helpful in an array comprised of
multiple X28HC64 memories that is frequently updated.
Toggle Bit Polling can also provide a method for status
checking in multiprocessor applications. The timing
diagram in Figure 4 illustrates the sequence of events on
the bus. The software flow diagram in Figure 5 illustrates
a method for polling the Toggle Bit.
COMPARE
NO
OK?
YES
READY
3857 FHD F15
5