X25F128 Datasheet, PDF (5/14 Pages) Xicor Inc. – SerialFlash™ Memory With Block Lock™ Protection

X25F128
Operational Notes
The device powers-up in the following state:
• The device is in the low power standby state.
• A HIGH to LOW transition on CS is required to
enter an active state and receive an instruction.
• SO pin is high impedance.
• The program enable latch is reset.
Data Protection
The following circuitry has been included to prevent
inadvertent programming:
• The program enable latch is reset upon power-up.
• A program enable instruction must be issued to set
the program enable latch.
• CS must come HIGH at the proper clock count in
order to start a program cycle.
Figure 1. Read SerialFlash Memory Array Operation Sequence
CS
SCK
0 1 2 3 4 5 6 7 8 9 10
20 21 22 23 24 25 26 27 28 29 30
INSTRUCTION
16 BIT ADDRESS
SI
15 14 13
3210
HIGH IMPEDANCE
SO
76
MSB
DATA OUT
543210
6829 ILL F03
Figure 2. Read Status Register Operation Sequence
CS
SCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
INSTRUCTION
SI
HIGH IMPEDANCE
SO
76
MSB
DATA OUT
543210
6829 ILL F04
5