X40010 Datasheet, PDF (3/25 Pages) Xicor Inc. – Dual Voltage Monitor with Integrated CPU Supervisor

X40010/X40011/X40014/X40015 – Preliminary
PIN DESCRIPTION (Continued)
Pin
SOIC TSSOP
5
7
6
8
7
1
8
2
Name
SDA
SCL
WDO
V_CC
Function
Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an
open drain output and may be wire ORed with other open drain or open collector outputs. This pin
requires a pull up resistor and the input buffer is always active (not gated).
Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to
LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this tran-
sition within the watchdog time out period results in WDO going active.
Serial Clock. The Serial Clock controls the serial bus timing for data input and output.
WDO Output. WDO is an active LOW, open drain output which goes active whenever the
watchdog timer goes active.
Supply Voltage
PRINCIPLES OF OPERATION
Power On Reset
Application of power to the X40010/11/14/15 activates a
Power On Reset Circuit that pulls the RESET/RESET
pins active. This signal provides several benefits.
– It prevents the system microprocessor from starting to
operate with insufficient voltage.
– It prevents the processor from operating prior to stabili-
zation of the oscillator.
– It allows time for an FPGA to download its configuration
prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power up.
When V_CC exceeds the device V_TRIP1 threshold value for
t_PURST (selectable) the circuit releases the RESET
(X40011) and RESET (X40010) pin allowing the system
to begin operation.
Low Voltage V_CC (V1 Monitoring)
During operation, the X40010/11/14/15 monitors the V_CC
level and asserts RESET/RESET if supply voltage falls
below a preset minimum V_TRIP1. The RESET/RESET
signal prevents the microprocessor from operating in a
power fail or brownout condition. The V1FAIL signal
remains active until the voltage drops below 1V. It also
remains active until V_CC returns and exceeds V_TRIP1 for
t_PURST.
Low Voltage V2 Monitoring
The X40010/11/14/15 also monitors a second voltage
level and asserts V2FAIL if the voltage falls below a
preset minimum V_TRIP2. The V2FAIL signal is either
ORed with RESET to prevent the microprocessor from
operating in a power fail or brownout condition or used to
interrupt the microprocessor with notification of an
impending power failure. For the X40010/11 the V2FAIL
signal remains active until the V_CC drops below 1V (V_CC
falling). It also remains active until V2MON returns and
exceeds V_TRIP2 by 0.2V. This voltage sense circuitry
monitors the power supply connected to the V2MON pin.
If V_CC = 0, V2MON can still be monitored.
For the X40014/15 devices, the V2FAIL signal remains
actice until V_CC drops below 1Vx and remains active until
V2MON returns and exceeds V_TRIP2. This sense circuitry
is powered by V_CC. If V_CC = 0, V2MON cannot be moni-
tored.
Figure 1. Two Uses of Multiple Voltage Monitoring
X40011-A
V_CC V2MON
6–10V
1M
1M
5V
V_CC
Reg
RESET
V2MON
(2.9V)
V2FAIL
System
Reset
Resistors selected so 3V appears on V2MON when unregulated
supply reaches 6V.
Unreg.
Supply
3.3V
Reg
1.2V
Reg
X40014-C
V_CC
V_CC
RESET
V2MON
V2FAIL
System
Reset
Notice: No external components required to monitor two voltages.
REV 1.3.4 7/12/02
www.xicor.com
Characteristics subject to change without notice. 3 of 25