English
Language : 

X9521 Datasheet, PDF (19/26 Pages) Xicor Inc. – Dual DCP, EEPROM Memory
X9521 – Preliminary Information
A.C. CHARACTERISTICS (See Figure 22, Figure 23, Figure 24)
Symbol
fSCL
tIN (5)
tAA (5)
tBUF (5)
tLOW
tHIGH
tSU:STA
tHD:STA
tSU:DAT
tHD:DAT
tSU:STO
tDH (5)
tR (5)
tF (5)
tSU:WP
tHD:WP
Cb
SCL Clock Frequency
Parameter
Pulse width Suppression Time at inputs
SCL LOW to SDA Data Out Valid
Time the bus free before start of new transmission
Clock LOW Time
Clock HIGH Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
WP Setup Time
WP Hold Time
Capacitive load for each bus line
400kHz
Min
Max
0
400
50
0.1
0.9
1.3
1.3
0.6
0.6
0.6
100
0
0.6
50
20 +.1Cb (2)
300
20 +.1Cb (2)
300
0.6
0
400
Units
KHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
ns
µs
µs
pF
A.C. TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
0.1VCC to 0.9VCC
10ns
0.5VCC
See Figure 20
NONVOLATILE WRITE CYCLE TIMING
Symbol
Parameter
tWC(4)
Nonvolatile Write Cycle Time
Min.
Typ.(1)
5
Max.
10
Units
ms
CAPACITANCE (TA = 25˚C, F = 1.0 MHZ, VCC = 5V)
Symbol
Parameter
COUT (5)
Output Capacitance (SDA, V1RO, V2RO, V3RO)
CIN (5)
Input Capacitance (SCL, WP)
Max
Units
8
pF
6
pF
Test Conditions
VOUT = 0V
VIN = 0V
Notes: 1.
Notes: 2.
Notes: 3.
Notes: 4.
Notes: 5.
Typical values are for TA = 25˚C and VCC = 5.0V
Cb = total capacitance of one bus line in pF.
Over recommended operating conditions, unless otherwise specified
tWC is the time from a valid STOP condition at the end of a write sequence to the end of the self-timed internal nonvolatile write
cycle. It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
This parameter is not 100% tested.
REV 1.1.9 1/30/03
www.xicor.com
Characteristics subject to change without notice. 19 of 26