X40626 Datasheet, PDF (17/23 Pages) Xicor Inc. – Dual Voltage CPU Supervisor with 64K Serial EEPROM

X40626
TIMING DIAGRAMS
Bus Timing
t_F
SCL
t_SU:STA
SDA IN
t_HD:STA
t_HIGH
t_LOW
t_SU:DAT
t_HD:DAT
SDA OUT
t_R
t_AA t_DH
WP Pin Timing
SCL
SDA IN
WP
START
Clk 1
Slave Address Byte
Clk 9
t_SU:WP
t_HD:WP
t_SU:STO
t_BUF
Write Cycle Timing
SCL
SDA
8th bit of Last Byte
ACK
t_WC
Stop
Condition
Start
Condition
Nonvolatile Write Cycle Timing
Symbol
t_WC⁽¹⁾
Parameter
Write Cycle Time
Min.
Typ.⁽¹⁾
5
Max.
10
Units
mS
Notes: (1) t_WC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle.
It is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
REV 1.1.15 2/11/04
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Characteristics subject to change without notice. 17 of 23