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X24F064 Datasheet, PDF (13/18 Pages) Xicor Inc. – SerialFlash TM Memory with Block Lock TM Protection
X24F064/032/016
Bus Timing
SCL
SDA IN
tSU:STA
tF
tHIGH
tLOW
tHD:STA tHD:DAT
tSU:DAT
tR
tSU:STO
tAA
tDH
tBUF
SDA OUT
6686 ILL F17
Program Cycle Limits
Symbol
tPR(6)
Parameter
Program Cycle Time
Min.
The program cycle time is the time from a valid stop
condition of a write sequence to the end of the internal
erase/program cycle. During the program cycle, the
Bus Timing
Typ.(5)
Max.
Units
5
10
ms
6686 FRM T11.1
X24F064/032/016 bus interface circuits are disabled,
SDA is allowed to remain HIGH, and the device does
not respond to its slave address.
SCL
SDA
8th BIT
WORD n
ACK
tWR
STOP
CONDITION
START
CONDITION
6686 ILL F18
Notes: (5) Typical values are for TA = 25°C and nominal supply voltage (2.7V).
(6) tWR is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
time the device requires to automatically complete the internal program operation.
Guidelines for Calculating Typical Values of
Bus Pull-Up Resistors
120
100
RMIN =
VCC MAX
IOL MIN
=1.2KΩ
80
RMAX
=
tR
CBUS
60
MAX.
RESISTANCE
40
20 MIN.
RESISTANCE
0
0 20 40 60
80 100 120
BUS CAPACITANCE (pF)
6686 ILL F19.1
SYMBOL TABLE
WAVEFORM INPUTS
OUTPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
13