WM8953 Datasheet, PDF (95/100 Pages) Wolfson Microelectronics plc – Low Power Stereo ADC with PLL and TDM Interface

Production Data
WM8953
REGISTER
ADDRESS
R58 (3Ah)
Microphone
Bias
R59 (3Bh)
R60 (3Ch)
PLL (1)
R61 (3Dh)
PLL (2)
R62 (3Eh)
PLL (2)
R63 (3Fh) to
R116 (74h)
R117 (75h)
Access
Control
BIT
LABEL
DEFAULT
DESCRIPTION
3
BUFIOEN
2:0
15:8
7:6
MCDSCTH
[1:0]
5:3
MDCTHR
[2:0]
2
MCD
1
0
MBSEL
15:0
15:8
7
SDM
6
PRESCALE
5:4
3:0
PLLN
[3:0]
15:8
7:0
PLLK
[15:8]
15:8
7:0
PLLK
[7:0]
Reserved
0b
000b
00h
00b
000b
0b
0b
0b
0000h
00h
0b
0b
00b
8h
00h
31h
00h
26h
Enables the VGS / R current generator and the analogue input
bias
0 = Disabled
1 = Enabled
Reserved - Do Not Change
Reserved - Do Not Change
MICBIAS Short Circuit Current Detect Threshold
00 = 600uA
01 = 1200uA
10 = 1800uA
11 = 2400uA
These values are for AVDD=3.3V and scale proportionally with
AVDD.
MICBIAS Current Detect Threshold
000 = 200uA
001 = 350uA
010 = 500uA
011 = 650uA
100 = 800uA
101 = 950uA
110 = 1100uA
111 = 1200uA
These values are for AVDD=3.3V and scale proportionally with
AVDD.
MICBIAS Current and Short Circuit Detect Enable
0 = disabled
1 = enabled
Reserved - Do Not Change
Microphone Bias Voltage Control
0 = 0.9 * AVDD
1 = 0.65 * AVDD
Reserved - Do Not Change
Reserved - Do Not Change
Enable PLL Integer Mode
0 = Integer mode
1 = Fractional mode
Divide MCLK by 2 at PLL input
0 = Divide by 1
1 = Divide by 2
Reserved - Do Not Change
Integer (N) part of PLL frequency ratio.
Use values greater than 5 and less than 13.
Reserved - Do Not Change
Fractional (K) part of PLL frequency ratio
(Most significant bits)
Reserved - Do Not Change
Fractional (K) part of PLL frequency ratio
(Least significant bits)
15:2
0000h
1
EXT_ACCESS_ENA 0b
Reserved - Do Not Change
Extended Register Map Access
0 = disabled
1 = enabled
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PD, January 2009, Rev 4.0
95