WM8953 Datasheet, PDF (30/100 Pages) Wolfson Microelectronics plc – Low Power Stereo ADC with PLL and TDM Interface

WM8953
Production Data
INPUT PGA CONFIGURATION
Each of the four Input PGAs can be configured in single-ended or pseudo-differential mode.
Single-ended microphone operation of an Input PGA is selected by connecting the input source to
the inverting PGA input. The non-inverting PGA input must be connected to VMID by setting the
appropriate register bits.
For pseudo-differential microphone operation, the inverting and non-inverting PGA inputs are both
connected to the input source and not to VMID.
For any line input or other connection not using the Input PGA, the appropriate PGA input should be
disconnected from the external pin and connected to VMID.
Register bits LMN1, LMP2, LMN3, LMP4, RMN1, RMP2, RMN3 and RMP4 control connection of the
PGA inputs to the device pins as shown in Table 6. The maximum available attenuation on any of
these input paths is achieved using these bits to disable the input path to the applicable PGA.
REGISTER
ADDRESS
R40 (28h)
BIT
LABEL
7
LMP4
6
LMN3
5
LMP2
4
LMN1
3
RMP4
2
RMN3
1
RMP2
0
RMN1
Table 6 Input PGA Configuration
DEFAULT
DESCRIPTION
0b
LIN34 PGA Non-Inverting Input Select
0 = LIN4 not connected to PGA
1 = LIN4 connected to PGA
0b
LIN34 PGA Inverting Input Select
0 = LIN3 not connected to PGA
1 = LIN3 connected to PGA
0b
LIN12 PGA Non-Inverting Input Select
0 = LIN2 not connected to PGA
1 = LIN2 connected to PGA
0b
LIN12 PGA Inverting Input Select
0 = LIN1 not connected to PGA
1 = LIN1 connected to PGA
0b
RIN34 PGA Non-Inverting Input Select
0 = RIN4 not connected to PGA
1 = RIN4 connected to PGA
0b
RIN34 PGA Inverting Input Select
0 = RIN3 not connected to PGA
1 = RIN3 connected to PGA
0b
RIN12 PGA Non-Inverting Input Select
0 = RIN2 not connected to PGA
1 = RIN2 connected to PGA
0b
RIN12 PGA Inverting Input Select
0 = RIN1 not connected to PGA
1 = RIN1 connected to PGA
w
PD, January 2009, Rev 4.0
30