WM8940_07 Datasheet, PDF (74/85 Pages) Wolfson Microelectronics plc – Mono CODEC with Speaker Driver

WM8940
Pre-Production
REGISTER BIT
ADDRESS
28 (1Ch) 15:0
29 (1Dh) 15:0
30 (1Eh) 15:0
31(1Fh)
15:0
32 (20h) 15:10
9
8
7:6
5:3
2:0
33 (21h) 15:8
7:4
3:0
34 (22h) 15:9
8
7:4
3:0
35 (23h) 15:4
3
2:0
36 (24h) 15:8
7
6
5:4
LABEL
DEFAULT
ALCGAIN [5:0]
0000h
0000h
0000h
0000h
000000
0
ALCSEL
0
00
ALCMAX
111
ALCMIN
000
ALCHLD
000h
000
ALCLVL
1011
00h
ALCMODE
0
ALCDCY
ALCATK
NGEN
0011
0010
000h
0
NGTH
000
00h
PLL_POWERD 0
OWN
FRACEN
1
PLLPRESCALE 00
DESCRIPTION
Reserved
Reserved
Reserved
Reserved
Readback from this register will return the ALC gain in
this position
Reserved
ALC function select
0=ALC disabled
1=ALC enabled
Reserved
Set Maximum Gain of PGA
Set minimum gain of PGA
Reserved
ALC hold time before gain is increased.
ALC threshold level. Sets the desired signal level.
Reserved
Determines the ALC mode of operation:
0=Normal mode
1=Limiter mode.
Decay (gain ramp-up) time
ALC attack (gain ramp-down) time
Reserved
Noise gate function enable
1 = enable
0 = disable
Noise gate threshold
Reserved
PLL POWER
0=On
1=Off
Fractional Divide within the PLL
0=Disabled (Lower Power)
1=Enabled
00 = MCLK input multiplied by 2 (default)
01 = MCLK input not divided (default)
10 = Divide MCLK by 2 before input to PLL
11 = Divide MCLK by 4 before input to PLL
REFER TO
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Input Limiter /
Automatic Level
Control (ALC)
Master Clock and
Phase Locked
Loop (PLL)
Master Clock and
Phase Locked
Loop (PLL)
Master Clock and
Phase Locked
Loop (PLL)
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Pre-Production, Rev 3.0, February 2007
74