WM8940_07 Datasheet, PDF (14/85 Pages) Wolfson Microelectronics plc – Mono CODEC with Speaker Driver

WM8940
CONTROL INTERFACE TIMING – 3-WIRE MODE
Pre-Production
Figure 4 Control Interface Timing – 3-Wire Serial Control Mode
Test Conditions
DCVDD = 1.8V, DBVDD = AVDD = SPKVDD = 3.3V, DGND = AGND = SPKGND = 0V, TA = +25^oC, Slave Mode, fs = 48kHz,
MCLK = 256fs, 24-bit data, unless otherwise stated.
PARAMETER
Program Register Input Information
SCLK rising edge to CSB rising edge
SCLK pulse cycle time
SCLK pulse width low
SCLK pulse width high
SDIN to SCLK set-up time
SCLK to SDIN hold time
CSB pulse width low
CSB pulse width high
CSB rising to SCLK rising
Pulse width of spikes that will be suppressed
SYMBOL
tSCS
tSCY
tSCL
tSCH
tDSU
tDHO
tCSL
tCSH
tCSS
tps
MIN
TYP
MAX
UNIT
80
ns
200
ns
80
ns
80
ns
40
ns
40
ns
40
ns
40
ns
40
ns
0
5
ns
w
Pre-Production, Rev 3.0, February 2007
14