WM8581_07 Datasheet, PDF (62/100 Pages) Wolfson Microelectronics plc – Multichannel CODEC with S/PDIF Transceiver

WM8581
REGISTER BIT
ADDRESS
R35
0
SPDTXCHAN 5
23h
3:1
LABEL
MAXWL
CHANNEL
STATUS
BIT
32
DEFAULT
1
TXWL[2:0]
35:33
101
7:4 ORGSAMP
[3:0]
39:36
0000
Table 54 S/PDIF Transmitter Channel Status Bit Control 5
Production Data
DESCRIPTION
Maximum Audio sample word length
0 = 20 bits
1 = 24 bits
Audio Sample Word Length.
000 = Word Length Not Indicated
TXWL[2:0] MAXWL==1 MAXWL==0
001
20 bits
16 bits
010
22 bits
18 bits
100
23 bits
19 bits
101
24 bits
20 bits
110
21 bits
17 bits
All other combinations reserved
Original Sampling Frequency. See S/PDIF
specification for details.
0000 = original sampling frequency not
indicated
S/PDIF RECEIVER
INPUT SELECTOR
The S/PDIF receiver has one dedicated input, SPDIFIN1. This pin is a IEC-60958-3-compatible
comparator input by default or, if SPDIFIN1MODE is set, the pin will be a CMOS-compatible input.
There are three other pins which can be configured as either S/PDIF inputs or general purpose
outputs (GPOs). The four S/PDIF inputs are multiplexed to allow one input to go to the S/PDIF
receiver for decoding. The S/PDIF receiver can be powered down using the SPDIFRXD register bit.
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PD Rev 4.0 April 2007
62