English
Language : 

W682510_05 Datasheet, PDF (9/35 Pages) Winbond – DUAL-CHANNEL VOICEBAND CODECS
W682510/W682310
Law format. The μ-Law or A-Law format is pin-selectable through the μ/A-Law pin. The compression
format can be selected according to Table 7.1.
TABLE 7.1: PIN-SELECTABLE COMPRESSION FORMAT
μ/A-Law Pin
Format
VDD (HIGH)
VSSA (LOW)
A-Law
μ-Law
The digital 8-bit μ-Law or A-Law samples are fed to the PCM interface for serial or parallel
transmission at the sample rate supplied by the external frame sync FST.
7.1.1. AI1, AI2, AO1-, AO2-
AI1 and AI2 are the transmit analog inputs for channels 1 and 2. AO1- and AO2- are the transmit level
feedback for channels 1 and 2. AI1 and AI2 are inverting inputs for the Op-Amps. AO1- and AO2- are
connected to the outputs of the Op-Amps and are used to set the level, as illustrated below. When AI1
and AI2 are not used, connect AI1 to AO1- and AI2 to AO2-. During power saving mode and power
down mode, the AO1- and AO2- outputs are tied weakly to VSSA on the W682510 or are high
impedance on the W682310 (See table on page 14).
R2
AO1 -
C1 R1
CH1 Analog Input
AI1 -
+
R4
AO2 -
C2 R3
CH2 Analog Input
AI2 -
+
Gain=R2/R1 ≤ 10
R2 > 20 k Ohm
Gain=R4/R3 ≤ 10
R4 > 20 k Ohm
7.1.2. PCMT1
The PCM signal output of channel 1 when the parallel mode is selected. The PCM output signal is
sent from PCMT1 in a sequential order, synchronizing with the rising edge of the BCLK signal. The
MSB may be output at the rising edge of the FST signal, based on the timing between BCLK and FST.
This output pin is in a high impedance state except during 8-bit PCM output. It is also in a high
impedance state during power-saving state or power-down. When serial operation is selected, this pin
is configured to be the output of the serial multiplexed two channel PCM signal. A pull-up resistor must
Publication Release Date: April 2005
-9-
Revision A10