W682510_05 Datasheet, PDF (12/35 Pages) Winbond – DUAL-CHANNEL VOICEBAND CODECS

W682510/W682310
7.3.4. V_REF
This pin carries the signal ground voltage level and requires a bypass capacitor. A 0.1μF ceramic
(with low ESR for good high frequency response) capacitor needs to be connected between the V_SSA
pin and the V_REF pin.
7.3.5. PUI
Power up input signal. When the PUI pin is set to logic “0” level, the CODEC will go into power down
mode.
7.4. PCM INTERFACE
The PCM interface is controlled by pins PCMMS, BCLK, FSR & FST. The input data is received
through the PCMR pin and the output data is transmitted through the PCMT pin. The modes of
operation of the interface are shown in Table 7.2.
PCMMS
V_DD
[HIGH]
V_SS
[LOW]
TABLE 7.2: PCM INTERFACE MODE SELECTIONS
PCM Mode Data Available
Parallel
Mode
Serial Mode
CH1 data on PCMT1 & PCMR1
CH2 data on PCMT2 and PCMR2 (same timing as CH1)
CH1 data followed by CH2 receive data on PCMR2 (total 16 bits)
CH1 data followed by CH2 transmit data on PCMT1 (total 16 bits)
7.4.1. μ/A-Law
This pin selects the desired companding law. The CODEC will operate in the μ-law when this pin is at
a logic “0” level and in the A-law when at a logic “1” level. The CODEC operates μ-law if the pin is left
open, since this pin is internally pulled down.
TABLE 7.25: PIN-SELECTABLE COMPRESSION FORMAT
μ/A-Law pin
Format
HIGH (V_DD )
A-Law
LOW (V_SS), Floating
μ-Law
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