W39L040A Datasheet, PDF (9/26 Pages) Winbond – 512K × 8 CMOS FLASH MEMORY

W39L040A
6.4.2 DQ6: Toggle Bit
The W39L040A also features the "Toggle Bit" as a method to indicate to the host system that the
embedded algorithms are in progress or completed.
During an Embedded Program or Erase Algorithm cycle, successive attempts to read (#OE toggling)
data from the device at any address will result in DQ6 toggling between one and zero. Once the
Embedded Program or Erase Algorithm cycle is completed, DQ6 will stop toggling and valid data will
be read on the next successive attempt. During programming, the Toggle Bit is valid after the rising
edge of the fourth #WE pulse in the four write pulse sequence. For chip erase, the Toggle Bit is valid
after the rising edge of the sixth #WE pulse in the six write pulse sequence. For sector erase, the
Toggle Bit is valid after the last rising edge of the sector erase #WE pulse. The Toggle Bit is active
during the sector erase time-out.
Either #CE or #OE toggling will cause DQ6 to toggle.
6.5 Table of Operating Modes
6.5.1 Device Bus Operations
(VID = 12 ±0.5V)
MODE
#CE #OE #WE A0
Read
VIL VIL VIH A0
Write
VIL VIH VIL A0
Standby
VIH X X X
Write Inhibit
X VIL X
X
X
X VIH X
Output Disable
VIL VIH VIH X
Auto select Manufacturers ID VIL VIL VIH VIL
Auto select Device ID
VIL VIL VIH VIH
PIN
A1 A9
A1 A9
A1 A9
XX
XX
XX
XX
VIL VID
VIL VID
DQ0 − DQ7
Dout
Din
High Z
High Z/Dout
High Z/Dout
High Z
Code
Code
6.5.2 Auto-select Codes (High Voltage Method)
(VID = 12 ±0.5V)
DESCRIPTION
#CE #OE #WE A9
Manufacturer ID: Winbond
VIL VIL VIH VID
Device ID: W39L040A
VIL VIL VIH VID
THE OTHER ADDRESS
All Address = VIL
A1 = VIH, All other = VIL
DQ[7:0]
DAhex
D6hex
Publication Release Date: April 14, 2005
-9-
Revision A3