W25Q128FVSIG_13 Datasheet, PDF (81/97 Pages) Winbond – 3V 128M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI

W25Q128FV
9.3 Power-Up Power-Down Timing and Requirements
PARAMETER
VCC (min) to /CS Low
Time Delay Before Write Instruction
Write Inhibit Threshold Voltage
SYMBOL
tVSL⁽¹⁾
tPUW⁽¹⁾
VWI⁽¹⁾
SPEC
MIN
20
5
1.0
MAX
2.0
Note:
1. These parameters are characterized only.
VCC
VCC (max)
Program, Erase and Write Instructions are ignored
/CS must track VCC
VCC (min)
VWI
Reset
State
tVSL
Read Instructions
Allowed
tPUW
Device is fully
Accessible
UNIT
µs
ms
V
VCC
Figure 58a. Power-up Timing and Voltage Levels
/CS must track VCC
during VCC Ramp Up/Down
Time
/CS
Figure 58b. Power-up, Power-Down Requirement
Time
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Publication Release Date: October 01, 2012
Revision D