W83194R-17 Datasheet, PDF (8/21 Pages) Winbond – 100MHZ AGP CLOCK FOR SIS CHIPSET

W83194R-17/-17A
Bytes sequence order for I²C controller :
Clock Address
A(6:0) & R/W
Ack
8 bits dummy
Command code
Ack
8 bits dummy
Byte count
Ack
PRELIMINARY
Byte0,1,2...
until Stop
Set R/W to 1 when read back the data sequence is as follows :
Clock Address
A(6:0) & R/W
Ack
Byte 0
Ack
Byte 1
Ack
Byte2, 3, 4...
until Stop
8.3 SERIAL CONTROL REGISTERS
The Pin column lists the affected pin number and the @PowerUp column gives the state at true
power up. Registers are set to the values shown only on true power up. "Command Code" byte and
"Byte Count" byte must be sent following the acknowledge of the Address Byte. Although the data
(bits) in these two bytes are considered "don't care", they must be sent and will be acknowledge.
After that, the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and
acknowledged.
8.3.1 Register 0: CPU Frequency Select Register
Bit @PowerUp
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Pin
Description
-
0 = ¡Ó1.5% Spread Spectrum Modulation
1 = ¡Ó0.5% Spread Spectrum Modulation
-
SSEL2 ( Frequency table selection by software via I²C)
-
SSEL1 ( Frequency table selection by software via I²C)
-
SSEL0 ( Frequency table selection by software via I²C)
-
0 = Selection by hardware
1 = Selection by software I²C - Bit 6:4
-
0 = Spread Spectrum center spread type
1 = Spread Spectrum down spread type
-
0 = Normal
1 = Spread Spectrum enabled
-
0 = Running
1 = Tristate all outputs
Publication Release Date: Sep. 1998
-8-
Revision 0.20