W99681CF Datasheet, PDF (61/78 Pages) Winbond – JPEG USB Dual Mode Camera Chip

W99681CF
Power-on Default: XXXXH
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
CAPYS[9:0]
Bits 15-10 Reserved
Bits 9-0
Capture UV Frame Buffer Stride
This register specifies the WORD offset of vertically adjacent U or V components of the
captured video which is in planar mode. It is used for both buffer 0 and buffer 1. It is not
used if the captured video is in packed mode.
Video Capture Y FIFO Threshold Register (CR2E)
Read/Write
Index: 002EH
uC Address: 5CH - 5DH
Power-on Default: 0804H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
VCAPY_HT[4:0]
Reserved
VCAPY_LT[4:0]
Bits 15-13 Reserved
Bits 12-8 Video Capture Y FIFO High Threshold
When video capture FIFO (packed mode), or Y FIFO (planar mode) is filled to this threshold,
a request is generated to the DRAM controller for DRAM access. Initial value is 08H.
Bits 7-5 Reserved
Bits 4-0
Video Capture Y FIFO Low Threshold
When video capture FIFO (packed mode), or Y FIFO (planar mode) is fetched to this
threshold by DRAM controller, the FIFO is ready to release DRAM access to other pending
requests. Initial value is 04H.
Video Capture UV FIFO Threshold Register (CR2F)
Read/Write
Index: 002FH
uC Address: 5EH - 5FH
Power-on Default: 8484H
15 14 13 12 11 10 9 8 7 6 5 4
VCAPU_HT[3:0]
VCAPU_LT[3:0]
VCAPV_HT[3:0]
3210
VCAPV_LT[3:0]
- 61 -
Publication Release Date: March 2000
Revision A1