W99681CF Datasheet, PDF (49/78 Pages) Winbond – JPEG USB Dual Mode Camera Chip

W99681CF
Bit 4
SDRAM Delay Test (used for test mode only)
Bit 3
Reserved
Bits 2-0 Memory Controller Test Mode Select
Fast Serial Bus Write Registers 0~3 (CR06~CR09)
Read/Write
Index: 0006H - 0009H uC Address: 0CH - 13H
Power-on Default: 0000H
CR06
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
C7 D7 C6 D6 C5 D5 C4 D4 C3 D3 C2 D2 C1 D1 C0 D0
CR07
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
C15 D15 C14 D14 C13 D13 C12 D12 C11 D11 C10 D10 C9 D9 C8 D8
CR08
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
C23 D23 C22 D22 C21 D21 C20 D20 C19 D19 C18 D18 C17 D17 C16 D16
CR09
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
C31 D31 C30 D30 C29 D29 C28 D28 C27 D27 C26 D26 C25 D25 C24 D24
D[31:0]
C[31:0]
32-bit data for SDATA output. When fast serial bus is enabled (CR01_5 = 1), D[31:0] will be
output serially from LSB to MSB once CR09 is programmed.
32-bit data for SCLK output. When fast serial bus is enabled (CR01_5 = 1), C[31:0] will be
output serially from LSB to MSB once CR09 is programmed.
uC Access DRAM Start Address Low Register (CR0C)
Read/Write
Index: 000CH
uC Address: 18H - 19H
Power-on Default: XXXXH
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
uCA[15:0]
Bits 15-0 uC Access DRAM Start Address Low
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Publication Release Date: March 2000
Revision A1