W9864G2GH Datasheet, PDF (6/46 Pages) Winbond – 512K X 4 BANKS X 32BITS SDRAM

W9864G2GH
5. PIN DESCRIPTION
PIN NUMBER
24, 25, 26, 27, 60, 61, 62,
63, 64, 65, 66
22, 23
2, 4, 5, 7, 8, 10, 11, 13, 31,
33, 34, 36, 37, 39, 40, 42,
45, 47, 48, 50, 51, 53, 54,
56, 74, 76, 77, 79, 80, 82,
83, 85
20
19
18
PIN NAME FUNCTION
A0−A10
Address
BS0, BS1
Bank Select
DESCRIPTION
Multiplexed pins for row and column address.
Row address: A0−A10. Column address: A0−A7.
A10 is sampled during a precharge command to
determine if all banks are to be precharged or
bank selected by BS0, BS1.
Select bank to activate during row address latch
time, or bank to read/write during address latch
time.
DQ0−DQ31
Data
Input/ Output
Multiplexed pins for data output and input.
CS
RAS
CAS
Chip Select
Disable or enable the command decoder. When
command decoder is disabled, new command is
ignored and previous operation continues.
Row Address
Strobe
Command input. When sampled at the rising
edge of the clock RAS , CAS and WE define
the operation to be executed.
Column Address
Strobe
Referred to RAS
17
16, 28, 59, 71
68
67
1, 15, 29, 43
44, 58, 72, 86
3, 9, 35, 41, 49, 55, 75, 81
6, 12, 32, 38, 46, 52, 78, 84
14, 21, 30, 57, 69, 70, 73
WE
Write Enable
DQM0−DQM3
Input/Output
Mask
CLK
Clock Inputs
CKE
Clock Enable
VCC
VSS
VCCQ
VSSQ
NC
Power
Ground
Power for I/O
Buffer
Ground for I/O
Buffer
No Connection
Referred to RAS
The output buffer is placed at Hi-Z (with latency
of 2) when DQM is sampled high in read cycle.
In write cycle, sampling DQM high will block the
write operation with zero latency.
System clock used to sample inputs on the rising
edge of clock.
CKE controls the clock activation and
deactivation. When CKE is low, Power Down
mode, Suspend mode, or Self Refresh mode is
entered.
Power for input buffers and logic circuit inside
DRAM.
Ground for input buffers and logic circuit inside
DRAM.
Separated power from VCC, to improve DQ
noise immunity.
Separated ground from VSS, to improve DQ
noise immunity.
No connection.(The NC pin must connect to
ground or floating.)
Publication Release Date:Aug. 13, 2007
-6-
Revision A09