W83195WG-413 Datasheet, PDF (6/27 Pages) Winbond – Winbond Clock Generator

W83195WG-413/W83195CG-413
STEPLESS FOR ATI P4 CLOCK GENERATOR
3. PIN CONFIGURATION
XIN 1
XOUT 2
VDD48 3
USB_48 4
GND 5
VTT_PG#/PD 6
SCLK 7
SDATA 8
&_{FSC 9}
&_{CLKREQA# 10}
&_{CLKREQB# 11}
SRCT7 12
SRCC7 13
VDDSRC 14
GND 15
SRCT6 16
SRCC6 17
SRCT5 18
SRCC5 19
GND 20
VDDSRC 21
SRCT4 22
SRCC4 23
SRCT3 24
SRCC3 25
GND 26
ATIGT1 27
ATIGC1 28
#: Active low
*: Internal pull up resistor 120K to VDD
&: Internal Pull-down resistor 120K to GND
56 VDDREF
55 GND
54 ^&FSA/REF0
53 ^&FSB/REF1
52 REF2
51 VDDPCI
50 ^&CK410#/PCICLK0
49 GND
48 *CPU_STOP#
47 CPUT0
46 CPUC0
45 VDDCPU
44 GND
43 CPUT1
42 CPUC1
41 CPUT2_ITP
40 CPUC2_ITP
39 VDDA
38 GNDA
37 IREF
36 GND
35 VDDSRC
34 SRCT0
33 SRCC0
32 VDDATI
31 GND
30 ATIGT0
29 ATIGC0
4. BLOCK DIAGRAM
XIN
XOUT
FS(A:C)
C R # _ (A :B )
VTT_PG#
CK410#
CPU_STOP#
PD
SDATA
SCLK
A T IG L O O P
USBLOOP
CPULOOP
Spread
Spectrum
XTAL
OSC
Divider
Divider
& Sync
SRCLOOP
Spread
Spectrum
VCOCLK
M /N /R a tio
ROM
Divider
& Snyc
Latch
&POR
C o n tro l
Logic
& C o n fig
Register
I2C
Interface
2
ATIGT 0:1
ATIGC 0:1
2
48MHz
3
REF 0:2
3
CPUT 0:2
CPUC 0:2
3
6
SRCT 0,3:7
SRCC 0,3:7
6
PCI0
475
Publication Release Date: Feb 2006
-2-
Revision 0.6