W83195WG-413 Datasheet, PDF (16/27 Pages) Winbond – Winbond Clock Generator

W83195WG-413/W83195CG-413
STEPLESS FOR ATI P4 CLOCK GENERATOR
7.13 Register 12: ( Default : XXh )
BIT
AFFECTED PIN/
FUNCTION NAME(S)
PWD
FUNCTION DESCRIPTION
7 Reserved
6 KVAL<9>
5 KVAL<5>
0 Reserved
X ^{Define the PCI divider ratio}
Table-2 integrate the all divider configuration
X
4 KVAL<4>
3 KVAL<3>
X ^{Define the SRC divider ratio}
Refer to Table-2
X
2 KVAL<2>
1 KVAL<1>
0 KVAL<0>
X
Define the CPU divider ratio
X
Refer to Table-2
X
TYPE
R/W
R/W
R/W
R/W
Table-2 CPU, SRC, PCI divider ratio selection Table
LSB
PCI
SRC
CPU
Bit5
Bit3
Bit1,0
MSB
0
1
0
1
00
01
10
11
Bit2/
Bit4/
Bit9
0 Reserved Div20 Reserved Div6
1
Div24 Div30
Div8
Div10
Div2
Div8
Div3
Div8
Div4
Div8
Div6
Div8
7.14 Register 13: ( Default : 3Fh )
BIT
AFFECTED PIN/
FUNCTION NAME(S)
PWD
7 EN_MN_PROG
0
6 Reserved
0
5 Reserved
1
4 Reserved
1
FUNCTION DESCRIPTION
TYPE
0: Output frequency depend on frequency table
1: Program all clock frequency by changing M/N
value
The equation is
VCO =14.318MHz*(N+4)/ M.
Once the watchdog timer timeout, the bit will be
clear. Then the frequency will be decided by
hardware default FS<4:0> or desired
frequency select SAF_FREQ[4:0] depend on
EN_SAFE_FREQ (Reg0 – bit0).
Reserved
R/W
Reserved
R/W
- 12 -
Publication Release Date: Feb 2006
Revision 0.6