W24100 Datasheet, PDF (5/11 Pages) Winbond – 128K X 8 CMOS STATIC RAM

TIMING WAVEFORMS
Read Cycle 1
(Address Controlled)
Address
DOUT
TRC
TAA
TOH
Read Cycle 2
(Chip Select Controlled)
CS1
CS2
DOUT
TCLZ
TACS
Preliminary W24100
TOH
TCHZ
Read Cycle 3
(Output Enable Controlled)
Address
OE
CS1
CS2
D OUT
T RC
TAA
TAOE
TOLZ
TACS
TCLZ
TOH
TOHZ
T CHZ
Publication Release Date: October 1999
-5-
Revision A1