W78C52D Datasheet, PDF (4/18 Pages) Winbond – 8-BIT MICROCONTROLLER

Preliminary W78C52D
PSEN
Program Store Enable Output, active low. PSEN enables the external ROM onto the Port 0
address/data bus during fetch and MOVC operations. PSEN goes to a high impedance state during
reset with a weak pull-up.
XTAL1
Crystal 1. This is the crystal oscillator input. This pin may be driven by an external clock.
XTAL2
Crystal 2. This is the crystal oscillator output. It is the inversion of XTAL1.
VSS, VDD
Power Supplies. These are the chip ground and positive supplies.
BLOCK DIAGRAM
P1.0
~
Port
P1.7
1
INT2
INT3
P3.0
~
Port
P3.7
3
P4.0
~
Port
4
P4.3
Port 1
Latch
Interrupt
Timer
2
Timer
0
Timer
1
UART
ACC
T1
B
T2
PSW
Stack
ALU
Pointer
Port 0
Latch
DPTR
Temp Reg.
PC
Incrementor
Addr. Reg.
Port 3
Latch
Instruction
Decoder
&
Sequencer
SFR RAM
Address
256 bytes
RAM & SFR
Port 4
Latch
Bus & Clock
Controller
8K bytes
ROM
Watchdog
Timer
Oscillator
Reset Block
Power control
Port 2
Latch
XTAL1 XTAL2 ALE PSEN RST
VDD GND
P0.0
Port
0
~
P0.7
P2.0
Port
2
~
P2.7
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