W9825G2JB-6I-TR Datasheet, PDF (36/42 Pages) Winbond – 4 M X 4 BANKS X 16 BITS SDRAM

W9825G6JB
11.16 Auto-precharge Timing (Write Cycle)
0
1
2
3
4
5
6
7
8
9
CLK
(1) CAS Latency = 2
(a) burst length = 1
Command Write
AP
tWR
DQ
D0
Act
tR P
(b) burst length = 2
Command Write
DQ
D0
D1
AP
Act
tWR
tR P
(c) burst length = 4
Command Write
AP
Act
tWR
tR P
DQ
D0
D1
D2
D3
(d) burst length = 8
Command Write
DQ
D0
D1
D2
D3
D4
D5
D6
D7
AP
tWR
(2) CAS Latency = 3
(a) burst length = 1
Command
Write
AP
tWR
DQ
D0
Act
tR P
(b) burst length = 2
Command Write
DQ
D0
D1
(c) burst length = 4
Command Write
DQ
D0
D1
(d) burst length = 8
Command Write
DQ
D0
D1
AP
tWR
D2
D3
D2
D3
Act
tR P
AP
tWR
tR P
D4
D5
D6
D7
Act
AP
tWR
10 11 12
Act
tR P
Act
tR P
Note )
Write
represents the Write with Auto precharge command.
AP
represents the start of internal precharing.
Act
represents the Bank Active command.
When the /auto precharge command is asserted,the period from Bank Activate
command to the start of intermal precgarging must be at least tRAS (min).
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Publication Release Date: Jul. 17, 2014
Revision: A05