W9825G2JB-6I-TR Datasheet, PDF (15/42 Pages) Winbond – 4 M X 4 BANKS X 16 BITS SDRAM

W9825G6JB
9.5 AC Characteristics and Operating Condition
(VDD = 3.3V ± 0.3V, TA = 0 to 70°C for -6/-75, TA = -40 to 85°C for -6I) (Notes: 5, 6)
PARAMETER
-6
-6I
SYM.
MIN. MAX. MIN. MAX.
-75
MIN. MAX.
UNIT NOTES
Ref/Active to Ref/Active Command
Period
tRC 60
60
65
Active to precharge Command Period tRAS 42 100000 42 100000 45 100000 nS
Active to Read/Write Command Delay
Time
tRCD 15
18
20
Read/Write(a) to Read/Write(b)
Command Period
tCCD 1
1
1
tCK
Precharge to Active Command Period tRP 15
18
20
nS
Active(a) to Active(b) Command Period tRRD 2
2
2
tCK
CL* = 2
2
2
2
Write Recovery Time
tWR
tCK
CL* = 3
2
2
2
CLK Cycle Time
CL* = 2
CL* = 3
7.5 1000 10 1000 10 1000
tCK
6 1000 6 1000 7.5 1000
CLK High Level width
tCH
2
2
2.5
8
CLK Low Level width
tCL
2
2
2.5
8
CL* = 2
6
Access Time from CLK
tAC
CL* = 3
5
6
6
9
5
5.4
Output Data Hold Time
tOH 3
3
3
9
Output Data High
Impedance Time
CL* = 2
5.4
tHZ
CL* = 3
5.4
5.4
5.4
6
5.4
7
Output Data Low Impedance Time
Power Down Mode Entry Time
tLZ
0
0
0
nS
9
tSB
0
6
0
6
0
7.5
Transition Time of CLK (Rise and Fall)
tT
1
1
1
Data-in Set-up Time
tDS 1.5
1.5
1.5
8
Data-in Hold Time
tDH 0.8
0.8
1.0
8
Address Set-up Time
tAS 1.5
1.5
1.5
8
Address Hold Time
tAH 0.8
0.8
1.0
8
CKE Set-up Time
tCKS 1.5
1.5
1.5
8
CKE Hold Time
tCKH 0.8
0.8
1.0
8
Command Set-up Time
tCMS 1.5
1.5
1.5
8
Command Hold Time
tCMH 0.8
0.8
1.0
8
Refresh Time (8K Refresh Cycles)
tREF
64
64
64 mS
Mode register Set Cycle Time
tRSC 2
2
2
tCK
Exit self refresh to ACTIVE command tXSR 72
72
75
nS
* CL = CAS Latency
- 15 -
Publication Release Date: Jul. 17, 2014
Revision: A05