W9825G2JB-6I-TR Datasheet, PDF (14/42 Pages) Winbond – 4 M X 4 BANKS X 16 BITS SDRAM

W9825G6JB
9.3 Capacitance
(VDD = 3.3V ± 0.3V, f = 1 MHz, TA = 25°C)
PARAMETER
Input Capacitance
(A0 to A12, BS0, BS1, CS , RAS , CAS , WE , LDQM, UDQM, CKE)
Input Capacitance (CLK)
Input/Output Capacitance (DQ0DQ15)
Note: These parameters are periodically sampled and not 100% tested.
SYM.
CI
CCLK
CIO
MIN.
-
-
-
MAX. UNIT
3.8
pf
3.5
pf
6.5
pf
9.4 DC Characteristics
(VDD = 3.3V ± 0.3V, TA = 0 to 70°C for -6/-75, TA = -40 to 85°C for -6I)
PARAMETER
SYM.
Operating Current
tCK = min., tRC = min.
Active precharge command cycling
without burst operation
Standby Current
tCK = min., CS = VIH
VIH /L = VIH (min.) / VIL (max.)
Bank: inactive state
Standby Current
CLK = VIL, CS = VIH
VIH/L = VIH (min.) / VIL (max.)
Bank: inactive state
No Operating Current
tCK = min., CS = VIH (min.)
Bank: active state (4 Banks)
Burst Operating Current
(tCK = min.)
Read/ Write command cycling
Auto Refresh Current
(tCK = min.)
Auto refresh command cycling
Self Refresh Current
(CKE = 0.2V)
Self refresh mode
1 Bank operation
CKE = VIH
CKE = VIL
(Power Down mode)
CKE = VIH
CKE = VIL
(Power Down mode)
CKE = VIH
CKE = VIL
(Power Down mode)
IDD1
IDD2
IDD2P
IDD2S
IDD2PS
IDD3
IDD3P
IDD4
IDD5
IDD6
MAX.
-6/-6I
-75
60
55
25
20
2
2
12
12
2
2
35
30
12
12
80
75
75
70
2
2
UNIT NOTES
3
3
3
mA
3
3
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Publication Release Date: Jul. 17, 2014
Revision: A05